From da02d4c77027c4592ce65ae8297ec853e4a37e20 Mon Sep 17 00:00:00 2001 From: Matthias Kruk Date: Wed, 25 Sep 2019 17:07:48 +0900 Subject: [PATCH] Update the ESP0 and SS0 TSS entries when switching tasks --- kernel/arch/task.S | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/kernel/arch/task.S b/kernel/arch/task.S index 9f6a190..513c8a2 100644 --- a/kernel/arch/task.S +++ b/kernel/arch/task.S @@ -163,6 +163,23 @@ task_switch: movl $-1, %eax ret + /* put the task's ESP0 into the TSS */ + movl OFFSET_ESP0(%edi), %ecx + movl %ecx, CPU_ESP0(%eax) + movl $KERNEL_DATA, CPU_SS0(%eax) + + /* + * We need to figure out the task's privilege level and + * set the segment registers accordingly + */ + /* + movl $KERNEL_CODE, CPU_CS(%eax) + movl $KERNEL_DATA, CPU_DS(%eax) + movl $KERNEL_DATA, CPU_ES(%eax) + movl $KERNEL_DATA, CPU_FS(%eax) + movl $KERNEL_DATA, CPU_GS(%eax) + */ + 2: movl OFFSET_CR3(%edi), %ecx /* check if we can avoid writing to cr3, which would clear the TLB */ -- 2.47.3